Background
Taubin, Alexander was born on May 16, 1953 in Leningrad. Son of Rafail and Leonora (Rivlina) Taubin. arrived in Japan, 1993.
(Examines the theory and design of self-timed systems. The...)
Examines the theory and design of self-timed systems. The logical design of self-timed circuits (STCs) provides a focal point for, on the one hand, those interested in formal models of parallel computation and, on the other, hardware designers. The approach taken by the authors is to address general issues concerning the very nature of concurrency, as well as to demonstrate the particular features of asynchronous design. The book presents formal models of the specification and verification of parallel processes and describes methods for self-timed circuit synthesis and analysis. It is augmented by a demonstration-version of a CAD system called FORCAGE which consists of subsystems of behavior verification, self-timed circuit analysis and synthesis. The system can be run on a PC.
http://www.amazon.com/gp/product/0471935360/?tag=2022091-20
Taubin, Alexander was born on May 16, 1953 in Leningrad. Son of Rafail and Leonora (Rivlina) Taubin. arrived in Japan, 1993.
Master of Science, Electrical Engineering Institute, Leningrad, 1976. Doctor of Philosophy, Electrical Engineering Institute, 1981.
Engineer, Krasnaya Zaria Company, Leningrad, 1976-1978; researcher, Institute for Socio-Economics Problems, Leningrad, 1978-1989; senior researcher, TRASSA Research & Development Company, St. Petersburg, Russia, 1989-1993; professor, U. Aizu, Aizu-Wakamutsu, Japan, since 1993.
(Examines the theory and design of self-timed systems. The...)
Member Institute of Electrical and Electronics Engineers (senior ), Association Computing Machinery.
Married Tatiana Magnitskaia, July 6, 1996.