Background
Shah, Bhupendra Panalal was born on October 14, 1934 in Baroda, India. Arrived in United States, 58. Son of Panalal Girdharlal and Sulaxana P. (Parikh) Contractor.
Shah, Bhupendra Panalal was born on October 14, 1934 in Baroda, India. Arrived in United States, 58. Son of Panalal Girdharlal and Sulaxana P. (Parikh) Contractor.
Bachelor of Science in Electrical Engineering, Baroda University, 1956. Master of Science in Electrical Engineering, Indian Institute of Science, 1958. Master of Electrical Engineering, Syracuse University, 1961.
Registered profile engineer, District of Columbia, Virginia Assistant professor Catholic University, Washington, 1961-1967. Senior analyst Control Data Corporation, Washington, 1967-1969. Associate professor of University District of Columbia, Washington, 1970.
Summer fellow Central Intelligence Agency, Washington, 1983-1984, 85.
Electronic engineer United States Naval Surface Weapons Center, White Oak, Maryland., 1978-1983. Computer consultant, computer performance evaluation and capacity planner United States Navy and Central Intelligence Agency.
Executive secretary 3d Convention Asian Indians in North America, Washington, 1984. President, executive vice president national federation, executive director administration national federation Council Asian Indian Organizations, since 1983. Secretary India House of Worship, Inc., Silver Spring, Maryland, since 1976.
Member of Institute of Electrical and Electronics Engineers, Association Computing Machinery, Tau Alpha Pi, Eta Kappa Nu, Tau Beta Pi, Sigma Xi.
Married Devyani Zaveri Shah, November 16, 1959. Children: Nayan, Shailan.