Background
Sahu, Biranchinath Son of Debendra Nath and Sishubala Sahu.
Sahu, Biranchinath Son of Debendra Nath and Sishubala Sahu.
Doctor of Philosophy, Georgia Institute of Technology, Atlanta, 2004. Bachelor in Engineering with first class, Sambalpur University.
Senior design engineer Texas Instruments, Warwick, Rhode Island, 2004—2005, design lead Bangalore, India, 2005—2007, design manager, since 2007. Design engineer Silicon Laboratories, Austin, Texas.
Achievements include design of TPS51620 - 2phase CPU power controller. Patents pending for self-testing resistive ladder type digital-to-analog converter circuit. Patents pending for dual-mode digital-to-analog converter.
Design of TPS51610 - 1ph CPU Power controller. Patents for MCU with power-saving mode. Patents for digital PWM controller.
Patents pending for automatic current balancing in multi-phase on-time converters.
Active Child Education, Bangalore, 2007—2009. Member of Institute of Electrical and Electronics Engineers.
Married Amreeta Sahu, February 2, 2006. 1 child Samiksha.