Shaileshachandra Vachaspati Pandey

Background

Pandey, Shaileshachandra Vachaspati was born on August 9, 1979 in Ahmadabad, Gujarat, India. Son of Vachaspati Rajnath and Gayatri Rajnath Pandey.

Education

Bachelor of Technology in Electronics Engineering, Mumbai, 2000. Master of Technology in RF & Microwave Engineering, Indian Institute of Technology, Kharagpur, West Bengal, 2008. Postgraduate Diploma in Computer Applications, Madurai Kamraj University, 2001.

Career

Researcher & developer Indian Institute of Technology, 2007—2008. Lecturer Nirma Institute of Technology, Ahmadabad, 2001—2004, senior lecturer, since 2008. Consultant Circuit Systems (I) Ltd., Ahmadabad, 2004—2006.

Achievements

• Shaileshachandra Vachaspati Pandey has been listed as a noteworthy engineering educator by Marquis Who's Who.

Membership

Member of Institute of Electrical and Electronics Engineers, Indian Society Technology Education (life).

Connections

Married Namrata S. Mishra.

Father:

Vachaspati Rajnath

Mother:

Gayatri Rajnath Pandey

Spouse:

Namrata S. Mishra.