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Toshihide Nabatame Edit Profile

Engineer

Toshihide Nabatame, Japanese engineer. Achievements include patents for United States patent-12, Japan patent-4. Recipient Paper award, Institute of Electronics, Information and Communications Engineers, 2004, Symposium award of the 65th Symp. on Semi. and Integ. Circuit Technology, 2004.

Background

Nabatame, Toshihide was born on March 24, 1962 in Hitachi, Ibaraki, Japan. Son of Kisaburou and Sachie Nabatame.

Education

Bachelor of Engineering, Tohoku University, Japan, 1985. Master of Engineering, Tohoku University, Japan, 1987. Doctor of Philosophy, Tokyo Institute of Technology, Japan, 1994.

Career

Researcher Hitachi Research Laboratory, Hitachi Ltd., Japan, 1987—1996, senior researcher, 1998—2002. Senior engineer Process Development Department, Renesas Technology Corporation, Itami, Japan, since 2003. Chief researcher Nagoya Division International Supercondctivity Technology Center, Nagoya, Aichi, Japan, 1991—1994.

Guest professor The Research and Development Center, Kagoshima University, Kagoshima, Japan, 2003—2004. Group sub-leader High-k Gate Stack Gr of MIRAI Project, Tsukuba, since 2001.

Achievements

  • Achievements include patents for United States patent-12, Japan patent-4.

Works

  • Other Work

    • Committee member Electronic and Information Materials in Japan Institute Metals. Editor: (journal) Materia Japan in The Japan Institute of Metals.

Interests

  • Other Interests

    Travel, history.

Connections

Married Iku Satou, May 25, 1991. 1 child Nozomi.

father:
Kisaburou Nabatame

mother:
Sachie Nabatame

spouse:
Iku Satou

child:
Nozomi Nabatame