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Edward Joseph Yellig Edit Profile

Industrial engineer

Edward Joseph Yellig, industrial engineer.

Background

Yellig, Edward Joseph was born on October 11, 1965 in Evansville, Indiana, United States. Son of Vernon Leroy and Florence (Goedde) Yellig.

Education

Bachelor of Science, Purdue University, 1988. Master of Science, Purdue University, 1990. Doctor of Philosophy, Arizona State University, 1996.

Career

System analyst, Pritsker Corporation, Indianapolis, 1990-1992;consultant, Tempe, Arizona, 1992-1996;senior simulation engineer, PRI Automation, 1996-1997;senior manufacturing modeling engineer, Intel Corporation, Chandler, Arizona, since 1997; M C.

Connections

father:
Vernon Leroy Yellig

mother:
Florence (Goedde) Yellig