Background
Yellig, Edward Joseph was born on October 11, 1965 in Evansville, Indiana, United States. Son of Vernon Leroy and Florence Yellig.
Yellig, Edward Joseph was born on October 11, 1965 in Evansville, Indiana, United States. Son of Vernon Leroy and Florence Yellig.
Bachelor of Science, Purdue University, 1988; Master of Science, Purdue University, 1990; Doctor of Philosophy, Arizona State University, 1996.
System analyst, Pritsker Corporation, Indianapolis, 1990-1992; consultant, Tempe, Arizona, 1992-1996; senior simulation engineer, PRI Automation, 1996-1997; senior manufacturing modeling engineer, Intel Corporation, Chandler, Arizona, since 1997; M C.