Background
Voldman, Steven Howard was born on September 8, 1957 in Rochester, New York, United States. Son of Carl Jerome and Blossom (Passer) Voldman.
(The scaling of semiconductor devices from sub-micron to n...)
The scaling of semiconductor devices from sub-micron to nanometer dimensions is driving the need for understanding the design of electrostatic discharge (ESD) circuits, and the response of these integrated circuits (IC) to ESD phenomena. ESD Circuits and Devices provides a clear insight into the layout and design of circuitry for protection against electrical overstress (EOS) and ESD. With an emphasis on examples, this text:* explains ESD buffering, ballasting, current distribution, design segmentation, feedback, coupling, and de-coupling ESD design methods;* outlines the fundamental analytical models and experimental results for the ESD design of MOSFETs and diode semiconductor device elements, with a focus on CMOS, silicon on insulator (SOI), and Silicon Germanium (SiGe) technology;* focuses on the ESD design, optimization, integration and synthesis of these elements and concepts into ESD networks, as well as applying within the off-chip driver networks, and on-chip receivers; and* highlights state-of-the-art ESD input circuits, as well as ESD power clamps networks. Continuing the author's series of books on ESD, this book will be an invaluable reference for the professional semiconductor chip and system ESD engineer. Semiconductor device and process development, quality, reliability and failure analysis engineers will also find it an essential tool. In addition, both senior undergraduate and graduate students in microelectronics and IC design will find its numerous examples useful.
http://www.amazon.com/gp/product/0470847549/?tag=2022091-20
(ESD: Circuits and Devices 2nd Edition provides a clear pi...)
ESD: Circuits and Devices 2nd Edition provides a clear picture of layout and design of digital, analog, radio frequency (RF) and power applications for protection from electrostatic discharge (ESD), electrical overstress (EOS), and latchup phenomena from a generalist perspective and design synthesis practices providing optimum solutions in advanced technologies. New features in the 2nd edition: • Expanded treatment of ESD and analog design of passive devices of resistors, capacitors, inductors, and active devices of diodes, bipolar junction transistors, MOSFETs, and FINFETs. • Increased focus on ESD power clamps for power rails for CMOS, Bipolar, and BiCMOS. • Co-synthesizing of semiconductor chip architecture and floor planning with ESD design practices for analog, and mixed signal applications • Illustrates the influence of analog design practices on ESD design circuitry, from integration, synthesis and layout, to symmetry, matching, inter-digitation, and common centroid techniques. • Increased emphasis on system-level testing conforming to IEC 61000-4-2 and IEC 61000-4-5. • Improved coverage of low-capacitance ESD, scaling of devices and oxide scaling challenges. ESD: Circuits and Devices 2nd Edition is an essential reference to ESD, circuit & semiconductor engineers and quality, reliability &analysis engineers. It is also useful for graduate and undergraduate students in electrical engineering, semiconductor sciences, microelectronics and IC design.
http://www.amazon.com/gp/product/B00WPN0TRY/?tag=2022091-20
(This volume is the first in a series of three books addre...)
This volume is the first in a series of three books addressing Electrostatic Discharge (ESD) physics, devices, circuits and design across the full range of integrated circuit technologies. "ESD Physics and Devices" provides a concise treatment of the ESD phenomenon and the physics of devices operating under ESD conditions. Voldman presents an accessible introduction to the field for engineers and researchers requiring a solid grounding in this important area. The book contains advanced CMOS, Silicon On Insulator, Silicon Germanium, and Silicon Germanium Carbon. In addition, it also addresses ESD in advanced CMOS with discussions on shallow trench isolation (STI), Copper and Low K materials.This book provides a clear understanding of ESD device physics and the fundamentals of ESD phenomena. It analyses the behaviour of semiconductor devices under ESD conditions. It addresses the growing awareness of the problems resulting from ESD phenomena in advanced integrated circuits. It covers ESD testing, failure criteria and scaling theory for CMOS, SOI (silicon on insulator), BiCMOS and BiCMOS SiGe (Silicon Germanium) technologies for the first time. It discusses the design and development implications of ESD in semiconductor technologies. It is an invaluable reference for EMC non-specialist engineers and researchers working in the fields of IC and transistor design. It is also suitable for researchers and advanced students in the fields of device/circuit modelling and semiconductor reliability.
http://www.amazon.com/gp/product/0470847530/?tag=2022091-20
(Interest in latchup is being renewed with the evolution o...)
Interest in latchup is being renewed with the evolution of complimentary metal-oxide semiconductor (CMOS) technology, metal-oxide-semiconductor field-effect transistor (MOSFET) scaling, and high-level system-on-chip (SOC) integration. Clear methodologies that grant protection from latchup, with insight into the physics, technology and circuit issues involved, are in increasing demand. This book describes CMOS and BiCMOS semiconductor technology and their sensitivity to present day latchup phenomena, from basic over-voltage and over-current conditions, single event latchup (SEL) and cable discharge events (CDE), to latchup domino phenomena. It contains chapters focusing on bipolar physics, latchup theory, latchup and guard ring characterization structures, characterization testing, product level test systems, product level testing and experimental results. Discussions on state-of-the-art semiconductor processes, design layout, and circuit level and system level latchup solutions are also included, as well as: * latchup semiconductor process solutions for both CMOS to BiCMOS, such as shallow trench, deep trench, retrograde wells, connecting implants, sub-collectors, heavily-doped buried layers, and buried grids - from single- to triple-well CMOS; * practical latchup design methods, automated and bench-level latchup testing methods and techniques, latchup theory of logarithm resistance space, generalized alpha (a) space, beta (b) space, new latchup design methods- connecting the theoretical to the practical analysis, and;* examples of latchup computer aided design (CAD) methodologies, from design rule checking (DRC) and logical-to-physical design, to new latchup CAD methodologies that address latchup for internal and external latchup on a local as well as global design level. Latchup acts as a companion text to the author's series of books on ESD (electrostatic discharge) protection, serving as an invaluable reference for the professional semiconductor chip and system-level ESD engineer. Semiconductor device, process and circuit designers, and quality, reliability and failure analysis engineers will find it informative on the issues that confront modern CMOS technology. Practitioners in the automotive and aerospace industries will also find it useful. In addition, its academic treatment will appeal to both senior and graduate students with interests in semiconductor process, device physics, computer aided design and design integration.
http://www.amazon.com/gp/product/0470016426/?tag=2022091-20
(Language:Chinese.Pub Date: 2014-09-01 Pages: 308 Publishe...)
Language:Chinese.Pub Date: 2014-09-01 Pages: 308 Publisher: Machinery Industry Press Machinery Industry Press ESD Physics and Devices systematic introduction to electrostatic discharge (ESD) physical theory and device design. and gives a lot of instances. the ESD theoretical engineering. The ESD Physics and Devices The main contents are: ESD electrostatic and thermoelectric physics theories and models. ESD semiconductor device physics and structure. ESD in the substrate. wells. isolation structure. dielectric. interconnection and related technologies such as SOI and applications. ESD physics and devices as the author of ESD series of monographs first book. for professional analog IC and RF IC design engineers. and system ESD engineer has high reference value. This book can serve as circuit design. technology. quality. reliability and error analysis engineer's tool can also b...
http://www.amazon.com/gp/product/7111471393/?tag=2022091-20
(ESD: Circuits and Devices 2nd Edition provides a clear pi...)
ESD: Circuits and Devices 2nd Edition provides a clear picture of layout and design of digital, analog, radio frequency (RF) and power applications for protection from electrostatic discharge (ESD), electrical overstress (EOS), and latchup phenomena from a generalist perspective and design synthesis practices providing optimum solutions in advanced technologies. New features in the 2nd edition: * Expanded treatment of ESD and analog design of passive devices of resistors, capacitors, inductors, and active devices of diodes, bipolar junction transistors, MOSFETs, and FINFETs. * Increased focus on ESD power clamps for power rails for CMOS, Bipolar, and BiCMOS. * Co-synthesizing of semiconductor chip architecture and floor planning with ESD design practices for analog, and mixed signal applications * Illustrates the influence of analog design practices on ESD design circuitry, from integration, synthesis and layout, to symmetry, matching, inter-digitation, and common centroid techniques. * Increased emphasis on system-level testing conforming to IEC 61000-4-2 and IEC 61000-4-5. * Improved coverage of low-capacitance ESD, scaling of devices and oxide scaling challenges. ESD: Circuits and Devices 2nd Edition is an essential reference to ESD, circuit & semiconductor engineers and quality, reliability &analysis engineers. It is also useful for graduate and undergraduate students in electrical engineering, semiconductor sciences, microelectronics and IC design.
http://www.amazon.com/gp/product/1118954467/?tag=2022091-20
(With the growth of high-speed telecommunications and wire...)
With the growth of high-speed telecommunications and wireless technology, it is becoming increasingly important for engineers to understand radio frequency (RF) applications and their sensitivity to electrostatic discharge (ESD) phenomena. This enables the development of ESD design methods for RF technology, leading to increased protection against electrical overstress (EOS) and ESD. ESD: RF Technology and Circuits: * Presents methods for co-synthesizisng ESD networks for RF applications to achieve improved performance and ESD protection of semiconductor chips; * discusses RF ESD design methods of capacitance load transformation, matching network co-synthesis, capacitance shunts, inductive shunts, impedance isolation, load cancellation methods, distributed loads, emitter degeneration, buffering and ballasting; * examines ESD protection and design of active and passive elements in RF complementary metal-oxide-semiconductor (CMOS), RF laterally-diffused metal oxide semiconductor (LDMOS), RF BiCMOS Silicon Germanium (SiGe), RF BiCMOS Silicon Germanium Carbon (SiGeC), and Gallim Arsenide technology; * gives information on RF ESD testing methodologies, RF degradation effects, and failure mechanisms for devices, circuits and systems; * highlights RF ESD mixed-signal design integration of digital, analog and RF circuitry; * sets out examples of RF ESD design computer aided design methodologies; * covers state-of-the-art RF ESD input circuits, as well as voltage-triggered to RC-triggered ESD power clamps networks in RF technologies, as well as off-chip protection concepts. Following the authors series of books on ESD, this book will be a thorough overview of ESD in RF technology for RF semiconductor chip and ESD engineers. Device and circuit engineers working in the RF domain, and quality, reliability and failure analysis engineers will also find it a valuable reference in the rapidly growing are of RF ESD design. In addition, it will appeal to graduate students in RF microwave technology and RF circuit design.
http://www.amazon.com/gp/product/0470847557/?tag=2022091-20
Voldman, Steven Howard was born on September 8, 1957 in Rochester, New York, United States. Son of Carl Jerome and Blossom (Passer) Voldman.
Bachelor of Science, University Buffalo, 1979. Master of Science, Massachusetts Institute of Technology, 1981. Electrical engineer, Massachusetts Institute of Technology, 1982.
Master of Science in Engineering Physics, University Vermont, 1986. Doctor of Philosophy, University Vermont, 1991. Postgraduate, International Business Machines Corporation, 1991.
Engineering assistant R.E. Ginna Nuclear Plant Rochester Gas & Electric, New York, 1977, 1978. Research associate Massachusetts Institute of Technology, Boston, 1979-1981, research associate high voltage research laboratory, 1981-1982. Staff level engineer International Business Machines Corporation, Burlington, Vermont, 1982—2007, 4-Mb Dynamic random-access memory development staff, 1985-1988, 16-Mb Dynamic random-access memory development staff, 1991-1993, 0.25 um advanced logic development, 1993—2007, 0.15 um development, SOI development, SIGE development, SEMATECH esd testors and testing chairman, 1997—2007, SiGe development, 2000—2007, SiGeC development, 2001—2007, senior engineer, 2002—2007.
Engineer Qimonda, since 2007. Expert witness Patent Litigation, since 2008, Taiwan Semiconductor Manufacturers Corporation, since 2008. Advisory engineer International Business Machines Corporation, since 1993, senior engineer, since 2003.
Board directors Conference on Judaism in Rural New England, Inc. Technical program committee International Reliability Physics, Symposium, Taiwan, Electrostatic Discharge Conference. Coordinator SEMATECH Electrostatic Discharge technical benchmarking group, since 1996, Integrated Reliability Workshop, 1999, International Reliability Physics Symposium, 2002, Electrical Overstress/Electrostatic Discharge Symposium, 1998, technical program chairman, 2000, steering committee, 2000—2001, vice-chairman, 2001, board director, general chairman, 01, technical roadmap chairman.
Technical committee International Reliability Physics Symposium, chairman subcommittee electrostatic discharge/latchup, 2002—2003. Liaison SEMATECH/Emergency Services and Disaster Agency. Chairman EOS/ESD Device Testing Standard Committee on Transmission Line Pulse, since 2001.
Steering committee Electrostatic Discharge Symposium, 2002—2003, general chairman, 2002. Technical program committee Taiwan Electrostatic Discharge Conference, International Conference on Electromagnetic App, Taipei, Taiwan. Board governor Taiwan Electrostatic Discharge Symposium, Singapore International Physical and Failure Analysis.
Member technical program committee Bipolar Circuit Technology Meeting, International Electrostatic Discharge Workshop, since 2006.
(ESD: Circuits and Devices 2nd Edition provides a clear pi...)
(ESD: Circuits and Devices 2nd Edition provides a clear pi...)
(With the growth of high-speed telecommunications and wire...)
(The scaling of semiconductor devices from sub-micron to n...)
(Interest in latchup is being renewed with the evolution o...)
(This volume is the first in a series of three books addre...)
(Language:Chinese.Pub Date: 2014-09-01 Pages: 308 Publishe...)
Board director Ohavi Zedek Synagogue, 1986—1990, board governor, since 2001. Board directors Ahavath Gevem Synagogue, since 2005. Board director University Vermont Hillel, since 1999.
Fellow Institute of Electrical and Electronics Engineers (Distinguished Lecturer, Election Device Society 2007). Member Electrostatic Discharge Association (board director, standards committee chairman transmission line pulse device 5.5 since 2001, education committee, board director, symposium general chairman, technical committee, Outstanding Contribution award), Massachusetts Institute of Technology Club Vermont, subcomittee chairman International Reliability Physics Symposium, 2004-2005, Sigma Xi, Phi Eta Sigma, Tau Beta Pi.
Married Annie Curry Brown, July 1986. Children: Aaron Samuel, Rachel Pesha.